基于FPGA的数字频率计设计+电路图

摘要在电子测量相关领域中，频率测量是应用最较广泛的一种测量。为了提高精确度，常用传感器模块将温度、流量、PH 值、各种气体的百分比等参量转换成信号频率，然后用频率计来测量。传统的频率计在测量信号时，测量精度会随着待测信号的变化而改变，为了改善这一现象，本设计采用 Verilog HDL 语言设计了一个基于 FPGA 的数字频率计。本设计采用等精度测频方法，使待测信号和时标信号可以在相同的闸门时间内同步测量。本设计还巧妙地将电子计数的原有功能转换为测周期，使用多周期的同步测量技术。系统可测量正弦波、方波、三角波三类信号的频率，测试结果表明，测频范围为 1Hz~10MHz；测量低频信号（1Hz~1000Hz）时，误差控制在1%左右；测量高频信号（1MHz~10MHz）时，测量误差在0.0052‰左右。51427
毕业论文关键词：Verilog HDL FPGA 频率计
The Digital Frequency Meter Based on FPGA
Abstract Frequency measure is widely used in the field of electronic measurement. Toimprove accuracy, the sensor module is commonly used to convert temperature, flow,PH value, the percentage of various gases and other parameters into a frequencysignal to be measured by a frequency meter. By this means, we can improve theaccuracy.Using traditional frequency meter to measure the signal, the measurementaccuracy will change with the change of the signals. In order to overcome theshortcomings this system designed a digital frequency meter based on FPGA by usingVerilog-HDL. This design uses equal precision frequency measurement method, sothat the measured signal and the standard signal can be measured simultaneously inthe same gate time. The electronic counting function is converted to test multi-cycle.The system can measure a sine wave, square wave and the triangular wave three typesof signals. Test results show that measuring frequency range is 1Hz to 10MHz; Theerror is controlled in about 1% when signal is the low-frequency signal (1Hz ~1000Hz); And the measurement error is about 0.0052 ‰ when measured signal ishigh-frequency signals ( 1MHz ~ 10MHz).
KeyWords：Verilog HDL FPGA Frequency meter

摘要..I

AbstractII

图清单..V

表清单..V

1绪论..1

1.1研究背景和意义.1

1.2发展现状与趋势.1

1.3FPGA概述及发展现状...2

2系统方案分析及比较选择3

2.1方案构想.3

2.2方案比较及选择.4

3工作原理及系统框图5

3.1直接测频法原理及误差分析5

3.2直接测周法原理及误差分析6

3.3等精度测量原理及误差分析7

4硬件设计.9

4.1FPGA最小系统9

4.2整形电路...10

4.3液晶显示模块...11

5软件设计...12

5.1VerilogHDL介绍...12

5.2预置闸门信号产生模块..13

5.332位除法器模块..13

5.432位乘法器模块..14

5.5计算频率值模块...15

6系统调试与分析...17

7总结18

参考文献19
1 绪论1.1 研究背景和意义在数字电路中，频率计属于时序电路的范畴，它是由各种触发器构成的，而且这些触发器均具有一定的记忆功能。无论是在计算机还是其他的各种数字仪表中，数字频率计都已经得到了普遍的应用。现如今，随着电子技术、数字技术及计算机科学等诸多不同技术领域的不断发展，电子计数器广泛地使用大规模集成电路，做到与微处理器有机的融合，数字频率计也因此时时得到改进与完善[1]。传统的频率计通常有着不可忽略的测量误差，本课题设计了一种基于 FPGA 的等精度测量频率计，充分应用 FPGA的高速数据采集技术，设计原理简约、测量精度高、电路相对稳定，有效地减少了生产周期。基于FPGA的数字频率计设计+电路图:http://www.youerw.com/zidonghua/lunwen_55057.html