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FPGA基于MicroBlaze软核的等精度频率计的设计+程序

时间:2024-01-01 10:27来源:毕业论文
基于MicroBlaze软核的等精度频率计的设计。在VIVADO软件开发平台下,调用32位的MicroBlaze软核CPU,利用Verilog语言,在FPGA芯片上构建等精度频率测量SOPC系统,再在SDK软件中,利用C语言进行编

摘  要: 本设计首先在VIVADO软件开发平台下,调用32位的MicroBlaze软核CPU,利用Verilog语言,在FPGA芯片上构建等精度频率测量SOPC系统,再在SDK软件中,利用C语言进行编程,实现对信号频率的等精度测量。设计的等精度数字频率计主要由前置调理模块、片上等精度频率测量模块和显示模块等部分组成。前置调理模块通过2N5485场效应晶体管对被测信号进行隔离放大,再经过高频运放MC10116进行整形放大后分成两路输出,其中一路经MB506芯片64分频用于高频信号测量,另一路用于低频测量;片上等精度频率测量模块接受信号调理模块输出的两路被测信号,当频率大于30MHz,自动切换到64分频输入,通过其MicroBlaze软核CPU完成测量控制与数据处理;显示模块采用LCD1602,将所测信号的频率、周期、脉宽、占空比进行实时显示。92511

毕业论文关键词: FPGA,MicroBlaze软核,等精度测量,频率计

Abstract:The design bases on VIVADO software development platform, calls 32-bit MicroBlaze soft core CPU and uses Verilog language to construct equal precision frequency measurement system of SOPC in the FPGA chip, then in SDK software, it achieves the signal frequency measurement by using C programming language。 The design of equal precision digital frequency meter is mainly composed of signal conditioning module, chip precision frequency measurement module and display module。 The signal conditioning module goes through the field effect transistor 2N5485 of the measured signal isolation amplifier, then the signal goes through high frequency amplifier MC10116 shaping amplification output,it is pided into two parts, one goes through 64 MB506 chip frequency for high frequency signal measurement, the other way is used for low frequency measurement and high accuracy; chip frequency measurement module accept signal conditioning module output two measured signals when the frequency is more than 30MHz and automatically switch to the 64 frequency input, the measurement control and data processing is completed by the MicroBlaze CPU core; display module uses LCD1602, the measured signal frequency, period, pulse width and duty ratio are for real-time display。

Key words: FPGA, MicroBlaze soft core, equal precision measurement, frequency meter

目   录

1 引言 4

2 FPGA技术 4

2。1 FPGA技术简介 4

2。2 Basys3 FPGA芯片 5

2。3 MicroBlaze软核 6

2。4 软件开发环境 7

2。4。1 Vivado软件开发环境 7

2。4。2 SDK软件开发环境 9

3 等精度频率测量原理 9

4 系统总体方案设计 11

5 系统硬件设计 11

5。1 前置调理模块设计 11

5。2 片上等精度测频模块设计 12

5。2。1 测频模块设计 12

5。2。2 主控模块设计 13

5。3 显示模块设计 14

6 系统软件设计 15

6。1 测频模块程序设计 15

6。2 主控模块程序设计 16

7 测试结果与分析 17

7。1 测试结果 FPGA基于MicroBlaze软核的等精度频率计的设计+程序:http://www.youerw.com/tongxin/lunwen_200195.html

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